[Eng Sub] 2.5D Package Technology: GPU+HBM, AMD, nVIDIA, TSMC

TL;DR

2.5D packaging uses silicon interposers to connect dies efficiently.

Transcript

Today I’d like to talk about 2.5D Package Technology which is one of the hottest topics in packaging technology. First of all, what is 2.5D Package Technology? 2.5D looks like this. It is the packaging technology using silicon interposer to connect dies on it. And silicon interposer has TSV, Through Silicon Via for vertical electrical interconnecti... Read More

Key Insights

• 2.5D package technology utilizes silicon interposers to connect multiple dies, enhancing electrical interconnections through TSV, or Through Silicon Via, for vertical integration.
• Silicon interposers have three vertical parts: BEOL layer for fine copper traces, TSV for vertical connections, and RDL for coarse copper traces.
• 2.5D differs from 3D packaging as it connects dies through an interposer, whereas 3D connects dies directly using TSV within the dies.
• Xilinx pioneered the 2.5D package with silicon interposers in 2012, significantly improving die yield by splitting large FPGA dies into smaller pieces.
• AMD introduced a 2.5D GPU and HBM combination in 2015, achieving a smaller size and better performance compared to traditional GPU + GDDR setups.
• nVIDIA followed with a similar GPU + HBM combination in 2016, incorporating a stiffener to minimize package warpage.
• Broadcom's 2018 network switch integrated network switch dies and HBM memory on a silicon interposer, demonstrating versatile applications of 2.5D technology.
• TSMC announced a massive 2.5D silicon interposer solution in 2020, featuring two processor dies and eight HBM modules, with plans for mass production in 2023.

Questions & Answers

Q: What is 2.5D package technology?

2.5D package technology is an advanced semiconductor packaging method that uses silicon interposers to connect multiple dies. This approach enhances electrical interconnections through Through Silicon Via (TSV), facilitating vertical integration and improving performance for high-performance applications such as GPUs and network switches.

Q: How does 2.5D differ from 3D packaging?

The key difference between 2.5D and 3D packaging lies in the method of die connection. In 2.5D, dies are connected through a silicon interposer, utilizing TSV for vertical connections. In contrast, 3D packaging connects dies directly, with TSV integrated within the dies themselves, allowing for a more compact structure.

Q: What are the components of a silicon interposer in 2.5D packaging?

A silicon interposer in 2.5D packaging consists of three main vertical components: the BEOL layer for fine copper traces, the TSV for vertical electrical connections, and the RDL for coarser copper traces. This structure facilitates efficient electrical interconnections between multiple dies, enhancing overall package performance.

Q: How did Xilinx utilize 2.5D technology in their products?

Xilinx utilized 2.5D technology by breaking a large FPGA die into smaller pieces and connecting them using a silicon interposer. This approach, introduced in 2012, improved die yield and manufacturing efficiency, marking a significant advancement in FPGA packaging and setting a precedent for future semiconductor developments.

Q: What advancements did AMD achieve with 2.5D technology?

AMD achieved significant advancements with 2.5D technology by combining a GPU with High Bandwidth Memory (HBM) in 2015. This integration resulted in a smaller package size and enhanced performance compared to traditional GPU + GDDR setups, showcasing the potential of 2.5D packaging in high-performance computing applications.

Q: How did nVIDIA incorporate 2.5D technology in their products?

nVIDIA incorporated 2.5D technology in their products by combining a GPU with HBM in 2016. They included a stiffener at the package periphery to minimize warpage, demonstrating an innovative approach to maintaining structural integrity while leveraging the benefits of 2.5D packaging for improved performance and efficiency.

Q: What role does TSMC play in 2.5D packaging advancements?

TSMC plays a pivotal role in 2.5D packaging advancements by developing large silicon interposers for complex semiconductor applications. In 2020, they announced a massive 2.5D solution featuring two processor dies and eight HBM modules, with plans for mass production in 2023, highlighting their leadership in the semiconductor foundry industry.

Q: What are some applications of 2.5D package technology?

2.5D package technology is applied in various high-performance computing applications, including GPUs, FPGAs, and network switches. Companies like Xilinx, AMD, nVIDIA, and Broadcom have utilized this technology to enhance performance, reduce package size, and improve manufacturing efficiency, demonstrating its versatility and impact on the semiconductor industry.

Summary & Key Takeaways

• 2.5D package technology is a cutting-edge method in semiconductor packaging, using silicon interposers to connect different dies. This technology enables efficient electrical interconnections through TSV, improving integration and performance for high-performance applications like GPUs and network switches.

• The structure of silicon interposers in 2.5D packaging includes a BEOL layer for fine copper traces, TSV for vertical electrical connections, and RDL for coarser traces. This setup distinguishes 2.5D from 3D packaging, which uses direct die connections.

• Major industry players like Xilinx, AMD, nVIDIA, and Broadcom have adopted 2.5D technology for various applications, from FPGAs to GPUs and network switches, illustrating its versatility. TSMC's recent developments further highlight the ongoing advancements in this field.