The Future of DeepTech and the Implications of High Costs

The Future of DeepTech and the Implications of High Costs

In recent years, there has been a growing interest in deep technology (DeepTech) and its potential to revolutionize various industries. However, as we delve deeper into the world of DeepTech, it becomes evident that certain challenges and limitations need to be addressed. This article aims to explore the future of DeepTech, specifically focusing on the government's role, the high costs associated with advancements, and potential solutions to overcome these barriers.

Government-led initiatives have played a crucial role in fostering innovation and driving the adoption of DeepTech. However, it seems that the government's involvement in promoting DeepTech has taken a different direction. In terms of finance, there will not be a fourth phase of pilot projects. The focus has shifted towards establishing standards and conducting national surveys, such as procurement standards. The shift towards industry regulation and the involvement of major state-owned enterprises indicate a more market-driven approach to advancing DeepTech.

One of the significant challenges faced by DeepTech companies is the high cost of development and production. Taking the example of NVIDIA's H100 graphics card, both the H100 PCIe and SXM versions utilize five High Bandwidth Memory (HBM) stacks, with the H100S SXM version reaching six stacks. The H100 NVL version, which NVIDIA highly promotes, even boasts twelve stacks. Analysts estimate that the cost of a single 16GB HBM stack alone amounts to $240, making the cost of memory chips in the H100 NVL version approximately $3000. Moreover, the H100 is produced using TSMC's 4N (5nm) process, with each 12-inch wafer costing around $13,400 and capable of yielding up to 86 H100 chips. Considering these factors, TSMC's revenue per H100 chip can reach $155. However, due to the adoption of TSMC's CoWoS packaging technology, the actual revenue generated per H100 chip could exceed $1000. CoWoS, a combination of "Chip on Wafer" (CoW) and "on Substrate" (oS), involves the assembly of bare chips on the wafer and subsequent packaging on the substrate. While traditional packaging only includes the oS stage, the addition of the CoW stage poses challenges beyond the capabilities of conventional packaging and testing facilities. Despite the impressive benefits of CoWoS, the high cost of $4000-$6000 per wafer has deterred many, including industry giants like Apple. As a result, TSMC's capacity for CoWoS production remains limited.

To address the challenges and ensure the future success of DeepTech, actionable steps can be taken:

1. Collaboration and Partnerships: DeepTech companies should actively seek collaborations and partnerships with government entities, industry leaders, and research institutions. By fostering a collaborative ecosystem, companies can leverage shared resources, expertise, and funding opportunities to overcome financial barriers.

2. Advanced Packaging Technologies: Exploring alternative packaging technologies that offer cost-effective solutions can significantly impact the overall cost of DeepTech products. Research and investment in innovative packaging techniques, such as fan-out wafer-level packaging (FOWLP) or system-in-package (SiP), could potentially reduce costs while maintaining performance.

3. Diversification of Funding Sources: DeepTech companies should explore diverse funding sources beyond traditional venture capital. Crowdfunding platforms, corporate partnerships, government grants, and strategic investments can provide alternative avenues for securing financial support.

In conclusion, the future of DeepTech holds immense potential, but it also presents challenges, particularly in terms of government involvement and high costs. By fostering collaborations, investing in advanced packaging technologies, and diversifying funding sources, DeepTech companies can navigate these challenges and accelerate innovation. As the DeepTech landscape continues to evolve, it is crucial to address these barriers to unlock the full potential of this transformative technology.