Generating custom AXI4-Stream IP core using Xilinx Vivado

Transcript

Hello all. So in this project we are trying to use the DMA based data transfer to our peripheral. So as I mentioned before, we are going to use Xilinx IP core as the DMA controller, but one thing that we are missing is a peripheral to which I will transfer data. So we'll make a simple peripheral. Now remember the interface between the DMA controlle... Read More