CMFB Using Triode Devices - Stability and Frequency Compensation Op-Amp - Analog & Mixed VLSI Design

TL;DR

This lecture discusses a feedback topology that converts the output common voltage to resistance or current, addressing drawbacks such as limited voltage swing and dependence on device parameters.

Transcript

hello everyone in this lecture we will study about cmmv using tryout devices okay in this we'll study about a simple feedback topology which utilizes the output common volt voltage to be directly converted to a resistance or a current which prohibits comparison with a reference voltage and where we are on 7 and in parallel with r of 8 it's just the... Read More

Key Insights

• ⚡ The feedback topology converts the output common voltage to resistance or current for comparison with a reference voltage.
• ⚡ Device parameter dependence and limited voltage swing are drawbacks of this topology.
• 💦 Applying feedback to the tail current minimizes the voltage drop but does not address all the drawbacks.

Questions & Answers

Q: How does the feedback topology convert the output common voltage?

The output common voltage is directly converted to a resistance or current in this feedback topology, allowing for comparison with a reference voltage.

Q: What are the drawbacks of this topology?

The drawbacks include the dependence of the output common mode level on device parameters, limited voltage swing due to voltage drop, and the introduction of capacitance by wider devices.

Q: How can the voltage drop across R0.7 in parallel with R0n be minimized?

Applying feedback to the tail current of the input differential pair can minimize the voltage drop across R0.7 in parallel with R0n, but it does not address the other two drawbacks.

Q: How can the sensitivity of the output common mode level to the input voltage be determined?

The sensitivity can be determined using the equation dVout cm / dVb = (Vds 7-8 / (Vgs 7-8 - Vth)), where Vds 7-8 and Vgs 7-8 are the drain-source and gate-source voltages of F7 and M8, respectively.

Summary & Key Takeaways

• The lecture explains a feedback topology that utilizes the output common voltage to generate a resistance or current.

• This topology balances drain currents to set the output common mode level.

• Drawbacks include dependence on device parameters, limited voltage swing, and the introduction of capacitance.