low power design, verification, and implementation with ieee 1801™ upf™ 720p

TL;DR

The video discusses low power design challenges and solutions using IEEE 1801 UPF.

Transcript

my name is Eric Marner I'm a verification architect with Mentor graphics and I'm the the organizer for this session I'm sure all of you are familiar with some of the challenges that are coming up with regard to low power design the obvious ones are consumer demand for products that use less power at the same time is having m... Read More

Key Insights

• Low power design is crucial due to consumer demands for efficient products with more functionality and longer battery life. The trend of shrinking feature sizes increases static leakage, complicating power management.
• Hardware description languages traditionally do not model power management, necessitating additional modeling layers to address power effects and management complexities.
• Unified Power Format (UPF) is a standard for defining power intent, enabling early verification and driving implementation flow. It originated under Accellera and evolved under IEEE.
• Power domains in UPF are collections of instances grouped for power management. They allow multiple logical hierarchies to belong to the same power domain, facilitating flexible power management.
• Power management techniques include power gating, multi-voltage design, and dynamic voltage and frequency scaling (DVFS), which help in optimizing power usage by turning off unnecessary power or adjusting voltage levels.
• UPF 2.0 introduced supply sets, abstracting power supplies to simplify hierarchical composition and incremental specification, enabling more precise power management modeling.
• Sim States in UPF 2.0 allow modeling of power state behaviors, such as corrupt or normal states, providing more detailed simulation capabilities.
• UPF supports both hierarchical and flat design methodologies, allowing flexibility in design and integration processes, especially in complex systems with multiple IP blocks.

Questions & Answers

Q: What are the main challenges in low power design?

The main challenges in low power design include meeting consumer demands for products with less power consumption, more functionality, and longer battery life. Shrinking feature sizes exacerbate static leakage, complicating power management. Additionally, traditional hardware description languages do not model power effects, requiring additional layers for power management.

Q: How does Unified Power Format (UPF) help in power management?

Unified Power Format (UPF) helps in power management by providing a standard for defining power intent. It enables early verification of power management strategies and drives the implementation flow. UPF allows designers to model power domains, supply networks, and power states, facilitating efficient power management in complex designs.

Q: What are power domains in UPF?

Power domains in UPF are collections of instances grouped for power management purposes. They allow designers to manage power efficiently by grouping components that share similar power requirements. Power domains can encompass multiple logical hierarchies, providing flexibility in power management strategies and enabling designers to optimize power usage.

Q: What techniques are used for power management in UPF?

Power management techniques in UPF include power gating, which turns off specific groups of cells to save power; multi-voltage design, which uses discrete voltages for different design portions; and dynamic voltage and frequency scaling (DVFS), which adjusts voltage and frequency on-the-fly to optimize performance and power consumption.

Q: What are supply sets in UPF 2.0?

Supply sets in UPF 2.0 are abstractions that group power supplies into a single entity, simplifying power management. They allow designers to define power states and manage power distribution more efficiently. Supply sets facilitate hierarchical composition and incremental specification, making it easier to manage complex designs with multiple power domains.

Q: How do Sim States enhance power management modeling in UPF 2.0?

Sim States in UPF 2.0 enhance power management modeling by allowing designers to specify the behavioral impact of different power states. Designers can model states such as corrupt, normal, or corrupt on activity, providing detailed simulation capabilities to verify power management strategies and ensure correct functionality under various power conditions.

Q: What methodologies does UPF support for design and integration?

UPF supports both hierarchical and flat design methodologies, offering flexibility in design and integration processes. Hierarchical methodologies involve configuring IP blocks out of context and integrating them into larger systems, while flat methodologies involve configuring and verifying power management strategies from the top level. This flexibility is crucial for managing complex systems with multiple IP blocks.

Q: How does UPF facilitate the integration of hard and soft IPs in a design?

UPF facilitates the integration of hard and soft IPs by providing systematic approaches for defining and connecting power intent. For soft IPs, designers can define power domains and supply sets, which are then linked to system-level supplies. Hard IPs can be modeled with supply sets and port attributes, ensuring consistent power management across the design and simplifying the integration process.

Summary & Key Takeaways

• The video explores challenges in low power design, emphasizing the increasing difficulty due to shrinking feature sizes and static leakage. It highlights the need for power management modeling in hardware description languages.

• Unified Power Format (UPF) is presented as a solution for defining power intent, allowing early verification and implementation flow. UPF's evolution from Accellera to IEEE is discussed, showcasing its role in power management.

• The video delves into UPF 2.0's features, such as supply sets and Sim States, which enhance power management modeling. It covers power domains, power management techniques, and methodologies for integrating UPF in design processes.