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4.2.3 Inverting Logic

July 12, 2019
by
MIT OpenCourseWare
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4.2.3 Inverting Logic

TL;DR

Understanding the tradeoff between speed and size in circuit designs helps determine when to use inverting or non-inverting gates.

Transcript

Now would be a good time to take a moment to look at the documentation for the library of logic gates we'll use for our designs. Look for "The Standard Cell Library" handout in the Updates & Handouts tab, which is next to the Courseware tab. The information on this slide is taken from there. The library has both inverting gates (such as inverters, ... Read More

Key Insights

  • 🔬 Gate libraries include both inverting and non-inverting gates for design flexibility.
  • 🔬 Inverting gates are faster but larger, while non-inverting gates are slower but smaller.
  • 🐎 The tradeoff between speed and size allows slower gates to be used for non-speed-sensitive portions of a circuit.
  • 🔢 Demorgan's Law enables the building of NAND and NOR gates with a large number of inputs.
  • 💨 NAND/NAND circuits are faster for sum-of-products implementations, while NOR/NOR circuits reduce capacitive load.

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Questions & Answers

Q: Why does the gate library include both inverting and non-inverting gates?

Including both types of gates allows for flexibility in circuit designs and tradeoffs between speed (inverting gates) and size (non-inverting gates). Different circuits may prioritize different aspects.

Q: How does the size of a gate affect its speed?

In general, larger gates have lower resistance and can switch faster. However, larger gates also impose a higher capacitive load on input signals, which can slow them down. It depends on the specific design considerations.

Q: How can slower gates be used without affecting overall circuit performance?

In a complex circuit, the propagation delay is determined by the components on the longest path. Shorter paths can potentially use slower gates without impacting the overall performance. This tradeoff allows for smaller gate sizes in non-speed-sensitive portions of the circuit.

Q: Why do the gate sizes and speeds differ for inverting and non-inverting gates?

The creators of the gate library intentionally designed the gates with tradeoffs in mind. Non-inverting gates are smaller but slower because they use MOSFETs with smaller widths. Inverting gates are designed to be faster and larger.

Summary & Key Takeaways

  • The library of logic gates used in circuit designs includes both inverting gates (inverters, NANDs, NORs) and non-inverting gates (buffers, ANDs, ORs).

  • Inverting gates are faster but larger, while non-inverting gates are slower but smaller.

  • In complex circuits, the longest path determines the overall speed, so slower gates can be used for shorter paths without affecting overall performance.

  • Implementing Boolean identities like Demorgan's Law allows for the construction of NAND and NOR gates with a large number of inputs.

  • Sum-of-products circuits can be implemented using inverting logic gates (NAND/NAND) for faster performance or using non-inverting logic gates (NOR/NOR) for reduced capacitive load on input signals.


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