3.2.8 Worked Examples: CMOS Logic Gates

TL;DR

Learn how to design a CMOS circuit that implements a negated function ((A OR B) AND C).

Transcript

In this problem, we are given a function Z equal to ((A OR B) AND C), the whole thing negated. We are then asked to produce a CMOS circuit that implements the function Z. We know that our CMOS circuits consists of a pull-down circuit made up purely of NFETs, and it is called pull-down because if it is on, it connects the output to ground to produce... Read More

Key Insights

• 🇨🇬 Z = NOT((A OR B) AND C); NOT(Z) = ((A OR B) AND C)
• 🔙 The pull-down circuit is activated when ((A OR B) AND C) equals 1, and it consists of a parallel (A, B) in series with C.
• 🔙 The pull-up circuit is activated when ((A OR B) AND C) equals 0, and it is designed as series(A, B) in parallel with C.
• 😘 The pull-down circuit connects the output to ground, producing a low (0) output, while the pull-up circuit connects the output to Vdd, producing a high (1) output.

Questions & Answers

Q: What is the purpose of the pull-down circuit in a CMOS circuit?

The pull-down circuit, consisting of NFETs, connects the output to ground when activated, producing a low (0) output.

Q: How is the pull-down circuit designed for the given function?

For the function Z = NOT((A OR B) AND C), the pull-down circuit includes a parallel (A, B) in series with C. When either (A = 1 and C = 1) or (B = 1 and C = 1), Z is pulled down to ground, resulting in a 0 output.

Q: What is the purpose of the pull-up circuit in a CMOS circuit?

The pull-up circuit, composed of PFETs, connects the output to Vdd when activated, producing a high (1) output.

Q: How is the pull-up circuit designed for the given function?

The pull-up circuit for Z = NOT((A OR B) AND C) is created by replacing parallel circuits with series and series with parallel. It is designed as series(A, B) in parallel with C. This configuration ensures that when the pull-down circuit is off, the pull-up circuit is activated.

Summary & Key Takeaways

• The CMOS circuit design aims to implement the negated function Z, which is NOT((A OR B) AND C).

• The pull-down circuit consists of NFETs and is activated when ((A OR B) AND C) equals 1, creating a low (0) output.

• The pull-up circuit, composed of PFETs, is activated when ((A OR B) AND C) equals 0, resulting in a high (1) output.