18.2.8 Worked Examples: Devices and Interrupts | Summary and Q&A

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July 12, 2019
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18.2.8 Worked Examples: Devices and Interrupts

TL;DR

The content discusses the impact of interrupt handling on program execution time and explores weak and strong priority ordering for device interrupts in a computer system.

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Questions & Answers

Q: What is the difference between a weak priority ordering and a strong priority ordering for device interrupts?

In a weak priority ordering, there is no preemption, and an interrupt handler runs to completion even if a higher priority interrupt arrives. In a strong priority ordering, a higher priority interrupt preempts a lower priority interrupt, allowing for priority-based handling.

Q: Why can a weak priority ordering fail to meet all system constraints?

In a weak priority system, if a higher priority interrupt handler is running when a lower priority interrupt arrives, the lower priority interrupt may miss its deadline. This happens when the total time required for the higher priority handler and the lower priority interrupt exceeds the interrupt's deadline.

Q: How can a strong priority ordering ensure meeting all system constraints?

With strong priority ordering, lower priority interrupt handlers can be preempted by higher priority interrupt handlers. By allowing preemption, the system can prioritize and guarantee meeting all interrupt deadlines by ensuring higher priority interrupts are serviced first.

Q: How can the priority ordering for device interrupts be determined?

In a strong priority system, the priority ordering can be determined by considering the deadlines of the devices. A device with a shorter deadline should have a higher priority. In the provided example, the valid strong priority ordering is D2 > D3 > D1.

Summary & Key Takeaways

  • The content introduces a computer system with three devices (D1, D2, and D3) that can cause interrupts. It explains the interrupt characteristics of each device, including service time, interrupt frequency, and deadline.

  • It discusses the effect of interrupt handling on program execution time and calculates the CPU time dedicated to handling each device.

  • The content explores weak and strong priority ordering for device interrupts and determines that a weak priority ordering cannot guarantee meeting all system constraints, while a valid strong priority ordering exists.

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